module compare_2a(A_lt_B,A_gt_B,A_eq_B,A1,A0,B1,B0);
input A1,A0,B1,B0;
output A_lt_B,A_gt_B,A_eq_B;
wire A_lt_B,A_gt_B,A_eq_B;
assign A_lt_B=(~A1)&B1(~A1)&(~A0)&B0(~A0)&B1&B0;
assign A_gt_B=A1&(~B1)A0&(~A0)&(~B0)(~A0)&B1&B0;
assign A_eq_B=(~A1)&(~A0)&(~B1)&(~B0)(~A1)&A0&(~B1)&B0A1&A0&B1&B0A1&(~A0)&B1&(~B0);
endmodule
input A1,A0,B1,B0;
output A_lt_B,A_gt_B,A_eq_B;
wire A_lt_B,A_gt_B,A_eq_B;
assign A_lt_B=(~A1)&B1(~A1)&(~A0)&B0(~A0)&B1&B0;
assign A_gt_B=A1&(~B1)A0&(~A0)&(~B0)(~A0)&B1&B0;
assign A_eq_B=(~A1)&(~A0)&(~B1)&(~B0)(~A1)&A0&(~B1)&B0A1&A0&B1&B0A1&(~A0)&B1&(~B0);
endmodule
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